This is in contrast to a scalar processor, whose instructions operate on single data items.

In all models, the scalar processor has a large 256 kilobyte cache.

This contrasts with scalar processors, which deal with one piece of data for every instruction.

Each instruction executed by a scalar processor typically manipulates one or two data items at a time.

The scalar processor was relatively slow in comparison to the CDC 7600.

Scalar processors represent a class of computer processors.

A scalar processor processes one datum at a time (typical data items being integers or floating point numbers).

The simplest processors are scalar processors.

The lower maximum throughput of these scalar processors is compensated for by efficiency and by running them at a high clock speed (made possible by their simplicity).

The R4600 was a simple design; it was a scalar processor, issuing up to one instruction per cycle to its integer pipeline or floating-point unit (FPU).

However, recognising the benefits of vector processing IBM developed Virtual Vector Architecture for use in supercomputers coupling several scalar processors to act as a vector processor.

Algorithms for vector processors are usually different than those for scalar processors since they can process multiple instructions and/or multiple data elements in parallel (for examples of these differences see 'description' in the main article).

Nevertheless the machines were rather inexpensive, and during the late 1970s supercomputers were seen as a source of national pride, and an effort started to commercialize the design by combining it with a scalar processor to create an all-in-one design.

In 2000, IBM, Toshiba and Sony collaborated to create the Cell processor, consisting of one scalar processor and eight vector processors, which found use in the Sony PlayStation 3 among other applications.

The SX-6 processor is a single chip implementation containing a vector processor unit and a scalar processor fabricated in a 0.15 μm CMOS process with copper interconnects, whereas the SX-5 was a multi-chip implementation.

The S-MP can be configured with up to eight 15ns Sparc scalar processors or a combination of one to two Vector II processors for 533 MFLOPS total vector performance, and up to four scalar Sparc processors.

The Cray XK6 system, capable of scaling to 500,000 processors and 50 petaflops of peak performance, combines Cray's Gemini interconnect, AMD's multi-core scalar processors, and NVIDIA's Tesla GPGPU processors.